Last past exam papers

Hi folks...

As I promised here it is the Last Past Exam

Final Exam Classroom

Hi guys..

This is the clasrrom for the last exam SIERRA NEVADA NORTE SALON 201

Last class

Hi fellows...

There will be no class on Tuesday 18th of May. Sorry for the delay in this announcement as it was something of the last minute.

Complex Systems Slides

Final Project

Hello guys..

Here it is the publication of the last project Final Project. This project is due on Monday 31th of May for both hardware and paper.

As one of the last post I would like you to write some feedback that you consider important for this course, for me or for the next one. Please feel free writing anything related with the course, and remember you always can write a comment here in an anonymous way.

State Machine Problems

Hi guys...

Here you have some state machines problems State Machine Problems 1, if you are smart enough to finish, then check this one State Machine Problems 2. If you are lucky enough to finish all that, it means you have plenty of free time, so keep your pace and check exercises 6.15 to 6.22 from the book Fundamentos de diseño lógico y de computadoras by Morris Mano & Charles R. Kime.

New classroom

Hello fellows...

The new classroom is SIERRA NEVADA NORTE SALON 201

Third Project

Hi guys...

Please visit this link Third Project in order to see the project for each group.

This project is due next Thursday May 20th, but I strongly recommend you present this on Thursday 13th becuase the week from the 24th to 22th the final project will be released.

State machines slides

Second Project feedback

Hi fellows..

Now it is available the second project feedback in this web page: http://sites.google.com/site/digitales1files/

Urgent!!!

PLEASE THE FOLLOWING STUDENTS CHECK HIS E-MAIL, THERE ARE IMPORTANT INFORMATION ABOUT THE PROJECT SUBMISSION

FRANCO JARABA

ANDRES MARQUEZ

Second exam term exercises

Hi pals..

Here you can find the last semester exams for Digitales 2 Exam 2 and Electiva 1 Exam 2 

I. Write down the hardware description of the following counters including all inputs and outputs:

1. 74HC163
2. 74HC160
3. 74LS190

You can find information of those CIs in Fundamentos Sistemas Digitales by Thomas Floyd in the chapter: Counters.

II. Write down the hardware description of the following shift registers including all inputs and outputs:

1. 74HC165
2. 74HC195
3. 74HC194

You can find information of these CIs in Fundamentos Sistemas Digitales by Thomas Floyd in the chapter: Shift Registers.

Second Project paper

Hi pals..

Here it is the second project paper Fair Dices. Any question please blog it here. You have to write a paper with similar rules than the first paper. The submission of the paper is due on Monday April 26th at 8:00 AM. You must show your project working properly in the FPGA board until April 27th at 6:00 PM.

First project feedback

Hello guys..

In this web page http://sites.google.com/site/digitales1files/ you can find your report feedback. Please take note of the observations made in order to not doing again...

First project submision

Hello folks...

Just to remind you that the report submision deadline is next monday at 8:00 PM, delays will be not accepted. Also, you must submit all your .vhdl files, including simulation, into a single either .zip or .rar file.

Here it is the Report Model Unimag. I strongly recommend edit this file instead of doing a new one. There is no page limit but keep in mind the shorter, the better.

You should take into account the following guidelines for your report:

1. Avoid writing theorical content (assume that readers are familiar with digital systems) and focus on a detailed description of your project.
2. Figures and tables are very important for your report. Every single figure and table must be numered and commented in the text explaining every detailed of it. You should not include any VHDL code in your report, you should include block diagrams in order to explain your system. Results of your synthesis process must be showed in your report (you can see this doubling click on the Synthesize-XST bottom in the process window and then double click on View RTL Schematic). Your report must be full of simulation diagrams of your project.
3. Take into account I do not use Microsoft Office. Therefore, sending your report as .DOCX file is a BAD IDEA because although I can open this type of file some format can be lost. You can send the file as .doc file and the best idea is sending it as .pdf file.
4. Check this file as Reference of a good report example.

VHDL Netlist Slides

Exam problems

Hi guys

Check this combinatorial problems for you to practice...

Check the first term exam paper from last semester of Digitales 2 First Exam Paper 2009-2. You can ignore memory exercises (1, 2 and 3) and focus on 4 and 5.

Here you can check the first term exam paper from last semester Electiva 1 First Exam Paper 2009-2

Combinatorial VHDL Slides

VHDL Structural (preliminary) Slides

Spartan3 Board Pinout

Hello guys...

Here it is the pins number for your Spartan3 Board Spartan3 Pinouts

or you can read it directly below...

SPARTAN3 STARTER KIT PINOUT CONFIGURATION

SW0 ( F12 ) ----- SW1 ( G12 ) ----- SW2( H14 ) ----- SW3 ( H13 )
SW4 ( J14 ) ----- SW5 ( J13 ) ------- SW6 ( K14 ) ---- SW7 ( K13 )


LD0 ( K12 ) --- LD1 ( P14 ) --- LD2 ( L12) --- LD3 ( N14) ---
LD4 (P13) ---- LD5 (N12) --- LD6 (P12) --- LD7 ( P11)

BTN0 ( M13 ) --- BTN1 ( M14 ) --- BTN2 ( L13 ) --- BTN3 ( L14 )

AN3 (E13)--- AN2 (F14) --- AN1 (G14) ---- AN0 (D14)

GCLK T9 (50 MHz)

SEGMENTOS

a (E14) --- b (G13) --- c (N15) --- d (P15) --- e (R16) --- f (F13) --- g (N16)

Welcome 2010 first semester

Hello guys...

I want to give you a very very very warm welcome to the Circuitos Digitales II course...

I suggest you to subscribe to this blog in order to keep up to date of the last news of the course...

I would like you to write something here for instance: your expectations about the course, some personal interest or topic... whatever you want...

Please upload a picture of you in your profile in order to help me to remain your name... thank you...

If you want to check the course programme out here it is, just follow this link Digitales II Programa. Take into account we are going to start from Unit 2, that is to say the memory we will be skipped.

Complex Digital Systems Slides